王伶俐
http://sme.fudan.edu.cn/faculty/personweb/wanglingli/

曹伟

1. Cao Wei, Hou Hui, Tong Jiarong , Lai Jinmei and Min Hao. “A High-performance Reconfigurable VLSI Architecture for VBSME in H.264”  IEEE Transactions on Consumer Electronics, Vol. 54, No. 3, AUGUST 2008, p1338~1345（SCI，EI）

2. Kanwen Wang, Jialin Chen, Wei Cao(通讯作者), Ying Wang, Lingli Wang, Member, IEEE, and Jiarong Tong. “A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design”. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 58, NO. 7, JULY 2011（SCI，EI）

3. Xitian Fan, Chenlu Wu, Wei Cao (通讯作者), Xuegong Zhou, Shengye Wang and Lingli Wang, “Implementation of High Performance Hardware Architecture of SURF Algorithm on FPGA”，ICFPT 2013.

4. Chen Liang, Chenlu Wu, Xuegong Zhou, Wei Cao (通讯作者), Shengye Wang and Lingli Wang, “An FPGA-cluster-accelerated Match Engine for Content-based Image Retrieval”, ICFPT 2013

5. Shengye Wang, Wei Cao(通讯作者), Lingli Wang, Na Wang, Ping Tao，“A Novel Structure of Dynamic Configurable Scan Chain - Bypassing Unconcerned Segments on the Fly”ASICON 2013

6. Chenlu Wu, Wei Cao(通讯作者), Xuegong Zhou, Lingli Wang, Baodi Yuan, Fang Wang，“A Reconfigurable Floating-Point FFT Architecture” ASICON 2013

7. Cao Wei, Hou Hui, Lai Jinmei, Mao Zhigang, Tong Jiarong and Min Hao. A Novel Reconfigurable VLSI Architecture for Motion Estimation. The 7th International Conference on ASIC, ASICON 2007 (EI: 083211440755) 

8. Cao Wei, Hou Hui, Lai Jinmei, Tong Jiarong and Min Hao. A High-Performance Reconfigurable 2-D Transform Architecture for H.264. The 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008) (EI: 085211819012)

9. Cao Wei, Hou Hui, Lai Jinmei, Tong Jiarong and Min Hao. A Novel Dynamic Reconfigurable VLSI Architecture for H.264 Transforms. The 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008) (EI: 20091411998686)

10. Hou Hui, Cao Wei, Zhang Fanjiong, Lai Jinmei and Tong Jiarong. High-Speed and Memory-Efficient Architecture for 2-D 1-Level Discrete Wavelet Transform. The 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008) (EI: 085211818983)

11. Cao Wei, Mao Zhigang. A novel VLSI architecture for VBSME in MPEG-4 AVC/H.264, IEEE International Symposium on Circuits and Systems (ISCAS) (IEEE Cat. No. 05CH37618): (Vol. 2) 1794-7 Vol. 2, 2005

12. Cao Wei, Mao Zhigang. A novel SAD computing hardware architecture for variable-size block motion estimation and its implementation with FPGA, 2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS: 950-953, 2003 （ISTP检索）

13. Cao Wei, Mao Zhigang, Zhang Yan, Lv ZhiQiang. VLSI architecture design for variable-size block motion estimation in MPEG-4 AVC/H.264, 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004, p 617-620 （EI检索）

14. Cao Wei, Mao Zhigang. Reconfigurable VLSI architecture for VBSME in MPEG-4 AVC/H.264, The 6th International Conference on ASIC, ASICON 2005（EI：071010467409）

15. Hong qi, Wang kanwen , Cao wei(通讯作者) , Tong Jiarong, A Reconfigurable Architecture for DWT and IDWT in JPEG2000, Proceedings 2009 8th IEEE International Conference on ASIC, Changsha, pp191-194.（EI）

16. Hong qi, Wang kanwen , Cao wei(通讯作者) , Tong Jiarong, “A Reconfigurable VLSI Structure for DWT”,The International Conference on Information Science and Technology(ICISE2009), Nanjing, 2009.12（EI）

17. Hong qi, Cao wei(通讯作者) , Tong Jiarong, “A Dynamically Reconfigurable VLSI Architecture for H.264 Integer Transforms”，Chinese Journal of Electronics Vol.21, No.3, July 2012

18. 曹伟，洪琪，侯慧，童家榕，来金梅，闵昊，“一种用于H.264编解码的新型高效可重构多变换VLSI结构”。《电子学报》，2009年第4期

19. 洪琪，曹伟（通讯作者），童家榕，“用于H.264编解码的面向HDTV应用的动态可重构多变换VLSI结构”，《电子学报》（将发表在2011年第8期）

20. 曹伟，高志强，来逢昌，毛志刚. 基于SRAM编程技术的PLD核心可重构电路结构设计”，《电子器件》，第27卷，第2期，2004年 （EI检索）

21. 曹伟，毛志刚，全搜索运动估计算法的高效VLSI结构设计, 《固体电子学研究与进展》，第26卷，第2期，2006年（EI检索）

周学功
论文：

1. XueGong Zhou, Liang Liang, Ying Wang, Chenglian Peng. Online Task Scheduling for Heterogeneous Reconfigurable Systems. in W. Shen et al. (eds.), Computer-Supported Cooperative Work in Design IV, Lecture Notes in Computer Science (LNCS), Springer-Verlag, Vol. 5236, pp.596-607, 2008

2. XueGong Zhou, Ying Wang, XunZhang Huang, ChengLian Peng, “Fast On-Line Task Placement and Scheduling on Reconfigurable Devices”, International Conference on Field-Programmable Logic and Application (FPL’07), pp.132-138, Aug. 2007

3. XueGong Zhou, Ying Wang, Xun-Zhang Huang, Cheng-Lian Peng, “On-line Scheduling of Real-Time Tasks for Reconfigurable Computing System”, IEEE International Conference on Field-Programmable Technology, pp. 57-64, December 2006

4. Jifang Jin, Jian Yan, Xuegong Zhou, Lingli Wang. An Adaptive Cross-Layer Fault Recovery Solution for Reconfigurable SoCs. The 2015 International Conference on Field-Programmable Technology (FPT 2015).Shengye Wang，Chen Liang，Xuegong Zhou，Wei Cao，Chenlu Wu，Xitian Fan，Lingli Wang，A hardware implementation of Bag of Words and Simhash for image recognition，2013 12th International Conference on Field-Programmable Technology, FPT 2013，418-421，Kyoto, Japan，2013.12.9 - 2013.12.11 

5. Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Lingli Wang and Philip Leong. UniStream: A Unified Stream Architecture Combining Configuration and Data Processing. 25th International Conference on Field Programmable Logic and Applications (FPL 2015).

6. Zhaotong Li，Zheng Huang，Shuai Chen，Xuegong Zhou，Wei Cao，Lingli Wang，A modeling and mapping method for coarse/fine mixed-grained reconfigurable architecture，2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012，Xi'an, China，2012.10.29 - 2012.11.1 

7. Zheng Huang，Zhaotong Li，Na Wang，Ping Tao，Xuegong Zhou，Lingli Wang，Repack: A packing algorithm to enhance timing and routability of a circuit，2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012，Xi'an, China，2012.10.29 - 2012.11.1 

8. Ying Wang，Xuegong Zhou，Lingli Wang，Jian Yan，Wayne Luk，Chenglian Peng，Jiarong Tong，SPREAD: A streaming-based partially reconfigurable architecture and programming model，IEEE Transactions on Very Large Scale Integration Systems，2013，21（12）：2179-2192

9. Ying Wang，Jian Yan，Xuegong Zhou，Lingli Wang，Wayne Luk，Chenglian Peng，Jiarong Tong，A partially reconfigurable architecture supporting hardware threads，2012 International Conference on Field-Programmable Technology, FPT 2012，269-276，Seoul, Korea, Republic of，2012.12.10 - 2012.12.12 

10. 周学功, 梁樑, 黄勋章, 彭澄廉, 可重构系统中的实时任务在线调度与放置算法, 计算机学报, Vol.30, No.11, pp.1901-1909, 2007

11. 周学功, 梁樑, 周博, 彭澄廉, 面向SOPC的异构IP快速集成, 计算机辅助设计与图形学学报, Vol.18, No.12, pp.1844-1849, 2006

12. 梁樑, 周学功, 王颖, 彭澄廉， 采用预配置策略的可重构混合任务调度算法，计算机辅助设计与图形学学报，Vol.19, No.5, pp. 635-641, 2007